Introduction

I would like to write about the FPGA subsystem for configuring the FPGA, which is also included in the mainline Kernel of Linux. It is mainly used when running an FPGA with an ARM CPU on Linux. You can configure the FPGA by overlaying the FPGA region of this Subsystem using the device tree overlay mechanism. It is a mechanism that even supports Partial Reconfiguration, but for the time being, I will mainly write about the case of configuring the entire FPGA.

For your reference: I checked the device tree, I checked the device tree Overlay

Components and how they work

The FPGA Subsystem consists of the following three frameworks.

FPGA region Configure the FPGA using FPGA Manager and FPGA bridge. It prevents strange signals (spurious signals) from being sent to the CPU side while rewriting the FPGA, and allows safe reconfiguration. The behavior of the configuration is controlled by the property specified in the overlay.
FPGA Manager FPGA configuration controller. Configuration is performed by sending a bitstream here. The state of the FPGA is also managed here.
FPGA bridge A bus bridge that connects the rewritten FPGA section and the CPU side. Depending on the implementation, it may not be necessary (if the FPGA Manager is taking care of the operation of the FPGA Bridge that is required. Full FPGA configuration of X series). In the case of Partial Reconfiguration, I think it will be created by the soft logic in the FPGA.

Device tree description required for FPGA configuration

Write a device tree description for configuring an FPGA using the FPGA subsystem.

In Base Tree

At least the following nodes must be in the Base Device tree (the device tree that is loaded at startup).

FPGA Manager node FPGA configuration controller. Compatible property uses a driver-like string for your FPGA: "xlnx, zynq-devcfg-1.0" for X-series, "altr, socfpga-fpga-mgr" for I-series.
FPGA region node The top-level FPGA region in the Base tree is called the Base FPGA region and is the node that represents the entire FPGA. The property of this FPGA region must have fpga-mgr = <phandle to FPGA Manager>;. If it corresponds to Partial reconfig, create another FPGA region node as a child node of Base FPGA region and make it Partial reconfig region. compatible property is "fpga-region".
FPGA bridge node This is as needed (depending on the type of FPGA). The FPGA bridge can be controlled by the FPGA region by making it the parent node of the FPGA region or by putting it in the property of the FPGA region.

`sample_base.dts(part)`


	fpga_mgr: fpga-mgr@ff706000 {
		compatible = "altr,socfpga-fpga-mgr";
        ...
	};

	fpga_bridge0: fpga-bridge@ff400000 {
		compatible = "altr,socfpga-lwhps2fpga-bridge";
        ...
	};

	base_fpga_region0: base-fpga-region0 {
		compatible = "fpga-region";
		fpga-mgr = <&fpga_mgr>;
	};

In Overlay

The configuration can be executed by writing the following in the device tree overlay file. Describe the following property and node in the node directly under the root.

"target-path" or "target" property Specify the FPGA region node that exists in the Base tree as the target node to be overlaid. target-path specifies the full pathname, target specifies the phandle
"__overlay__" node According to the overlay mechanism, write the overlay contents (property, nodes) under this node. The following content is written under this \ _ \ _ overlay \ _ \ _ node.
"firmware-name" property: Specify the configuration file name. Place the specified configuration file in / lib / firmware /.
\ # address-cells, # size-cells, ranges property: Required if you have child nodes that do address mapping.
Child nodes: option. Describe the node for the newly added hardware by configuring. (You may add it under another node)

`sample_overlay.dtso(part)`


/dts-v1/;
/plugin/;
/ {
    fragment@0 {
        target = <&base_fpga_region0>;
        ...
        __overlay__ {
            firmware-name = "soc_system.rbf"; 
            ...
        };
    };
};

Reference material

Kernel Source Tree Documentation / devicetree / bindings / fpga / fpga-region.txt https://www.kernel.org/doc/html/latest/driver-api/fpga/index.html https://elinux.org/images/8/88/Fpga_and_dt.pdf Solution Zynq PL Programming With FPGA Manager FPGA support situation in Linux Kernel 4.10

[LINUX] Configure FPGA in FPGA Subsystem (FPGA-region)